BICMOS NOR GATE

This is the schematic of BICMOS NOR Gate. I have explained in detail, the working of  BICMOS NAND GATE .This post will make the concept clear and also you have the schematic of BICMOS NOR GATE.

Logic

A B Y

0 0 1
0 1 0
1 0 0
1 1 0

1) When both A and B are 0. Both the PMOS will be ON. The base of Q1 will be VDD , say 5v. The base of Q1 is also connected to the GATE of bottom NMOS.  So, bottom NMOS is ON and it removes the base charge of Q2, if any and makes sure that Q2 is OFF. when A=0, B=0, Q1 is ON and Q2 is OFF.

BICMOS NOR GATE  has characteristics of both CMOS and BJT's . CMOS have ZERO STATIC POWER DISSIPATION and BJT's have HIGH TRANSCONDUCTANCE(High speed logic families). Also, BJT's have large current driving capability.

2) For other permutations of input.

For other inputs, the BASE charge of Q1 is removed by the 2  NMOS. The bottom NMOS is off and the output is pulled to Zero.


Note:  CMOS is by far, the best logic family. CMOS have zero static power dissipation, but BJT's are still imperious in terms of Speed.( ECL , still stands top as the high speed logic family). BJT's also have a large current driving capability, which MOSFET doesn't have. In order to have same current driving capability of that of BJT's , MOSFET SIZE needs to be significantly increased.

In order to incorporate both the advantages of CMOS and BJTs, BICMOS has been invented(Discovered, more aptly).  Still, it involves lot of mess to fabricate BICMOS. Nevertheless, BICMOS is one of the important logic family.


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