Working of BICMOS NAND GATE

There are many logical families such as RTL, DTL, ECL, CMOS etc.
All have their advantages and disadvantages. However, in the past decade, CMOS is ruling the electronics field because of its SIZE and POWER.

Did you know that ?

CMOS(Complementary metal oxide semiconductor) has ZERO static power dissipation. However, The switching speed of CMOS is very low compared to BJT, and also CMOS cannot drive large current to the load. In order to drive large current to the load, the size of MOS needs to be significantly increased.

Is there a logical family which incorporates the advantages of both CMOS and BJT?

Ans : Yes, and that logical family is called BICMOS.

        How to draw BICMOS ? How different it is from normal CMOS gates?

 We shall see BICMOS NAND GATE.

This is the two input BICMOS NAND gate.

It consists of
1) 2 PMOS PA and PB
2) 4 NMOS, NA1, NB1, NA3, NB3
3) Two BJT's QP and Q0


NAND GATE

A    B     Y
0    0      1
0    1      1
1    0      1
1    1      0


Case 1 : Both A and B are low.

If both the inputs VA and VB(Refer the circuit) are low(0). PA and PB will be ON and the base of QA will be high. THus the top BJT(QA) will be ON which pulls the output UP . If there is a capacitive load. The output current will be almost 101 times the base current i.e it will be 101IB(Assuming beta of transistor is 100). (if there was no BJT, the output current would be just IB).

Note: PA, PB, NA1 and NB1 are used for logical purposes(Just like in CMOS)

What is the purpose of N2, NB3 and NA3?

For high switching speeds of the BJT's, we need to remove the base charge from the transistor. In order to remove the charge from the base of the transistor we need a mechanism, that can be achieved by using these 3 NMOS. 

Why to remove the Base charge anyway?

If we do not remove the base charge, the transistor will be in ON state and takes a lot of time to go to the OFF state. If we do not remove the base charge, the whole purpose of BICMOS is lost.

 N2 MOS is getting input from the base of QA transistor. Since the base of QA is HIGH(say 5v), it will on N2 MOS. Since N2 is ON, it will PULL THE BASE CHARGE OUT OF Q0 transistor. So, if both the inputs are low, QA is ON and Q0 is OFF. OUTPUT IS HIGH and OUTPUT CURRENT IS LARGE. HIGH SWITCHING SPEED.



Case 2 : A and B are high

NB3 and NA3 NMOS make sure that QA is in OFF state. PA and PB are OFF. NB1, NA1 will be ON. The output is discharged via NB1, NA1 and Q0.(High Speed). N2 will be effectively out of circuit in this case. So, Q0 is ON and QP is OFF.

I have discussed 2 cases. You can correlate with the other 2 inputs.

Disadvantages of BICMOS
1) Fabrication cost is high
2) Due to VBE(Base to emitter voltage, 0.7v approximately) of BJT's , desirable performance is not obtained when the BICMOS gates are operated at lesser voltages (3V, 2.4V) etc.

For any Queries, please use the comment box. ADIOS!