BICMOS NOR GATE

This is the schematic of BICMOS NOR Gate. I have explained in detail, the working of  BICMOS NAND GATE .This post will make the concept clear and also you have the schematic of BICMOS NOR GATE.

Logic

A B Y

0 0 1
0 1 0
1 0 0
1 1 0

1) When both A and B are 0. Both the PMOS will be ON. The base of Q1 will be VDD , say 5v. The base of Q1 is also connected to the GATE of bottom NMOS.  So, bottom NMOS is ON and it removes the base charge of Q2, if any and makes sure that Q2 is OFF. when A=0, B=0, Q1 is ON and Q2 is OFF.

BICMOS NOR GATE  has characteristics of both CMOS and BJT's . CMOS have ZERO STATIC POWER DISSIPATION and BJT's have HIGH TRANSCONDUCTANCE(High speed logic families). Also, BJT's have large current driving capability.

2) For other permutations of input.

For other inputs, the BASE charge of Q1 is removed by the 2  NMOS. The bottom NMOS is off and the output is pulled to Zero.


Note:  CMOS is by far, the best logic family. CMOS have zero static power dissipation, but BJT's are still imperious in terms of Speed.( ECL , still stands top as the high speed logic family). BJT's also have a large current driving capability, which MOSFET doesn't have. In order to have same current driving capability of that of BJT's , MOSFET SIZE needs to be significantly increased.

In order to incorporate both the advantages of CMOS and BJTs, BICMOS has been invented(Discovered, more aptly).  Still, it involves lot of mess to fabricate BICMOS. Nevertheless, BICMOS is one of the important logic family.


 For any doubts on BICMOS LOGIC Family, please contact us or use the comment box.

Working of BICMOS NAND GATE

There are many logical families such as RTL, DTL, ECL, CMOS etc.
All have their advantages and disadvantages. However, in the past decade, CMOS is ruling the electronics field because of its SIZE and POWER.

Did you know that ?

CMOS(Complementary metal oxide semiconductor) has ZERO static power dissipation. However, The switching speed of CMOS is very low compared to BJT, and also CMOS cannot drive large current to the load. In order to drive large current to the load, the size of MOS needs to be significantly increased.

Is there a logical family which incorporates the advantages of both CMOS and BJT?

Ans : Yes, and that logical family is called BICMOS.

        How to draw BICMOS ? How different it is from normal CMOS gates?

 We shall see BICMOS NAND GATE.

This is the two input BICMOS NAND gate.

It consists of
1) 2 PMOS PA and PB
2) 4 NMOS, NA1, NB1, NA3, NB3
3) Two BJT's QP and Q0


NAND GATE

A    B     Y
0    0      1
0    1      1
1    0      1
1    1      0


Case 1 : Both A and B are low.

If both the inputs VA and VB(Refer the circuit) are low(0). PA and PB will be ON and the base of QA will be high. THus the top BJT(QA) will be ON which pulls the output UP . If there is a capacitive load. The output current will be almost 101 times the base current i.e it will be 101IB(Assuming beta of transistor is 100). (if there was no BJT, the output current would be just IB).

Note: PA, PB, NA1 and NB1 are used for logical purposes(Just like in CMOS)

What is the purpose of N2, NB3 and NA3?

For high switching speeds of the BJT's, we need to remove the base charge from the transistor. In order to remove the charge from the base of the transistor we need a mechanism, that can be achieved by using these 3 NMOS. 

Why to remove the Base charge anyway?

If we do not remove the base charge, the transistor will be in ON state and takes a lot of time to go to the OFF state. If we do not remove the base charge, the whole purpose of BICMOS is lost.

 N2 MOS is getting input from the base of QA transistor. Since the base of QA is HIGH(say 5v), it will on N2 MOS. Since N2 is ON, it will PULL THE BASE CHARGE OUT OF Q0 transistor. So, if both the inputs are low, QA is ON and Q0 is OFF. OUTPUT IS HIGH and OUTPUT CURRENT IS LARGE. HIGH SWITCHING SPEED.



Case 2 : A and B are high

NB3 and NA3 NMOS make sure that QA is in OFF state. PA and PB are OFF. NB1, NA1 will be ON. The output is discharged via NB1, NA1 and Q0.(High Speed). N2 will be effectively out of circuit in this case. So, Q0 is ON and QP is OFF.

I have discussed 2 cases. You can correlate with the other 2 inputs.

Disadvantages of BICMOS
1) Fabrication cost is high
2) Due to VBE(Base to emitter voltage, 0.7v approximately) of BJT's , desirable performance is not obtained when the BICMOS gates are operated at lesser voltages (3V, 2.4V) etc.

For any Queries, please use the comment box. ADIOS!

How to draw BODE PLOT In MATLAB!

Suppose take a transfer function

G(S) H(S)= 10/(S+1)

To plot a Bode Plot for this Transfer function. 

Open Matlab .
In the command window, write the co-efficients of S^2  and S as well as constant.

Following this rule, we shall write the numerator of G(S) H(S) as num=[0 0 10] , which means numerator only contains a constant i.e 10 .S^2 and S are absent

Coming to the denominator of G(S) H(S)=[0 1 1], which means denominator doesn't contains S^2, and co-efficient of S is 1 and the constant is 1.  

Figure 1

Bode plot of above TF can be drawn in Matlab using matlab command Bode(num,den) as shown above.

Bode Plot :

Figure 2

The transfer function G(S) H(S)=10/S+1 is a Single Pole transfer function.

Here  cutoff Frequency wc=1/(coefficient of S) is 1 rad/sec.

As you all know actual bode plot differs from the approximation bode plot by -3dB as shown below

Figure 3

REFER TO FIGURE 2

 We can see  that, at the cut-off frequency or  at the POLE, the Magnitude plot at the pole location varies by -3dB  i.e (20dB-3dB=17 dB. Hence We can conclude that Matlab gives actual Bode plot.

Feel free to ask any questions. We shall see few more Transfer functions in the next post. 

Zener Breakdown vs Avalanche Breakdown

Zener Breakdown

Avalanche Breakdown

She knows Conservation of Angular momentum .

True Love 

Common source Amplifier with source degeneration (i.e with Rs)

Hello all, this is the common source amplifier with source degeneration . As you can see the circuit has a source resistance. This resistor Rs has a big role to play.
The Rs decides the gain of the amplifier,stability etc. This is the most stable circuit than the common source amplifier.

Let's see the Gain of this amplifier.

The small signal model of common source amplifier with source degeneration is as shown above

Gain=Vout/vin

where

      vin=v1+ (gm*v1*Rs)

    vout=-(gm*v1*RD)

The gain of the amplifier is

The value of gmRs>>1 . So,the gain of the amplifier becomes

Vout/vin=-(RD/Rs)

So if RD=8k and Rs=2k

The gain of the common source amplifier will be 4.

Note: The gain of this amplifier depends totally on RD and Rs values. As long as they are constant ,the amplifier gain doesn't get affected. The amplifier is very stable and doesn't change its gain depending on the temperature as it's independent of gm. Thus Source degeneration influences the gain,stability etc.

For any Queries :Contact Hobby Projects.  

CMOS Amplifiers-Common Source Amplifier

Hello all! We are starting a new series on CMOS Amplifiers.
I am Sure you all will have a good time reading these posts.


Q) First let us understand WHAT IS AN AMPLIFIER?

Ans:An amplifier is an active device which gives  POWER GAIN.
where Power=voltage*current.
  Suppose you have 0.2 v sine wave as input and amplifier  gain is 10. Your amplifier output will be 0.2*10=2v(sine wave).

Note:LAW OF CONSERVATION OF ENERGY is not violated ,because the amplifier is an ACTIVE DEVICE. The active device doesn't create nor destroy the energy.The power gain is achieved by using the raw DC power supply(Which is usually a power supply to the amplifier). So, the amplifier being the active device uses the dc power supply to increase the power of the input signal. 


 summary

• An active device is one which converts the dc power into ac power. 
• Amplifier is an active device. It needs a power supply(DC) to amplify the input signals. It cannot amplify more than the DC supply voltage level.
• Amplifier amplifies small signal voltage levels(low power) to high power signals(Without modifying the signal) 

Thought for a day
 Is transformer an amplifier?? 
Yes 
No

Having learnt what is an amplifier.Let's go ahead with CMOS Amplifiers. 

CS Amplifier(Common emitter version of MOS)

Power gain is achieved in the above circuit with the help of DC supply(VDD). The amplification of small signals is facilitated by the amplifier(which uses VDD). 

The question is By what amount the the signals are amplified?
And: That is determined by the gm and RD.where gm=trans conductance of the amplifier
gm=iout/vin
Iout=Id(In MOS)
Vin=vgs(In MOS)
RD=Drain resistance.

In order to calculate the gain,the small signal model is used. The small signal model is as shown in the above picture.
There are some rules to be followed while drawing the small signal model(prerequisite){You can comment here if you want to know about small signal model}

So after the small signal model is done.

vout= -(gm*v1*RD)
Gain=vout/vin=-gm*RD. 

By this amount, the input signal gets amplified. Make sure that M1 is in saturation region.Triode has a very low gain!
i.e VDS>=VGS-VTH.

In the next part: we show the pros and cons of increasing RD to increase the gain(Does increasing RD i really increases the gain of the amplifier?)